The evolution of electronic circuitry as used in data processing equipment is toward ever increasing computer performance and ever greater miniaturization. At the integrated circuit module level, this evolution manifests itself in the form of smaller integrated circuit packages with a greater number of input/output leads. Thus, a higher density of input/output leads is needed without compromising the effectiveness of the circuit assembly process or the testing methodology.
The state of the art packaging of integrated circuit modules is represented by the flat pack module which consists of a ceramic or plastic casing body containing the silicon device in the shape of a square in plan view and which has a large number of leads attached to the four edges of the package. The number of leads required for the individual device and how close together the leads can be placed are generally determining factors in the sizes of the modules. With current advanced assembly techniques, the lead pitch of the state of the art for a four-sided quad flat packs has reached a practical limit of 0.015 inches. With modern integrated circuit devices requiring upwards of 300 IO leads, this lead pitch makes the integrated circuit package a determining factor in the overall circuit packaging density. The standard quad flat pack has a surface mounting board employing rigid leads, but with rigid leads, the lead pitch is typically not less than 0.025 inches. As an alternative to the use of rigid leads, wirebonds can be employed for the connecting circuitry. Wirebonds permit significant increases in the IO lead density, but the smaller conductors of the wirebonds are prone to damage and have less than optimum electrical performance.